The present invention relates to switch circuits used in a portable wireless device and the like, and in particular, relates to the prevention of spurious generation in the switch circuit which is used in switching between an input and an output and switching between two or more outputs.
A portable telephone is widely and commonly used. UMTS (W-CDMA) using CDMA (Code Division Multiple Access) as the multiple access of the portable telephone and GSM using TDMA (Time Division Multiple Access) are known as the major systems.
Integration of an RF section of the portable telephone has been progressing, and in GSM, a lot of products having an antenna switch and a power amplifier integrated on the same module (hybrid IC) are used.
At present, the antenna switch is often realized using a pHEMT which is one type of compound semiconductors. However, in order to achieve a reduction in cost, the realization of the antenna switch by means of a silicone device (CMOS) is important.
The related arts include U.S. Pat. No. 7,123,898 B2 (Patent Document 1), which discloses a technique for applying an SOS (Silicon on Safire) CMOS to the switch.
FIG. 1 is a conceptual diagram of this technique described in Patent Document 1. Here, for simplicity of description, an example with one transmission system and one reception system is taken.
The example of Patent Document 1 includes switches M1 and M2 on the transmission side and switches M3 and M4 on the reception-side. All the elements constituting these switches include an nMOSFET of low on-resistance and low power consumption.
In this example, the DC potential of each terminal is the earth potential. The gate voltage of an FET is increased in order to turn on the switch and the gate voltage is reduced in order to turn off the switch. If a power source voltage is 2.7 V and the threshold voltage of the FET is 0.7 V, then there is a margin voltage of 2.0 V from the threshold voltage when the FET is turned on, and there is a margin voltage of 0.7 V when the FET is turned off. Thus, the margins differ between the two states of on/off, and the margin especially in the off state is small. For this reason, when an input RF signal is large, the gate voltage may be forcibly increased by the RF signal and thus the FET may be in a pseudo-on state, resulting in an increase in the loss.
In order to prevent this, in the technique described in Patent Document 1, a negative bias (e.g., −3 V) is generated for the off-operation so as to sufficiently secure the margin voltage in the off-state.
For example, during transmission, +3 V is applied to the gate terminal of the switch M1 and −3 V is applied to the gate terminal of the shunt switch M2. The transmission output is thus coupled to a non-illustrated antenna. In addition, −3 V is applied to the gate terminal of the switch M3 on the reception-side and +3 V is applied to the gate terminal of the shunt switch M4. This decouples the reception input from the antenna. In this case, the margin voltage during off-state is set to 3.7 V, and thus the malfunction of the turned-off FET is suppressed.
Japanese Patent Laid-Open No. 2008-11120 (Patent Document 2) discloses that an nMOS is used for the switches (M1 and M3) on the through-side and a pMOS is used for the switches (M2 and M4) on the shunt-side, and thus the two FETs can be controlled with the same control voltage and the generation of the control signal is simplified.